Interactive tool for specifying dedicated hardware accelerators

Objectives

 

 

This dissertation arises from a research currently in progress, as a need to have an interactive tool that allows a user to visualize the entire data flow based on Megablocks representations and to manipulate them.

 

The mapper may make decisions that despite being chosen as the best, might not result as the most beneficial performance and a human point of view could be most useful to detect particular cases and make a final tweak.

 

Therefore, an interactive application will be developed to allow the user to see a graphical representation of the data flux of the code along with important statistical information. This will allow to have an overview of the entire execution flow and to immediately identify and do some specific operations on the hot-zones of the code without modifying its results. As hardware designers might not have background knowledge to totally understand and decipher the binary code, this application will have the feature to convert chosen code segments (represented as Megablocks) into its hardware representation in Verilog. The application will also keep track of the changes that the user does. This will allow to recover the latest version of the work that was done in case of an interruption either intended by the user or from a failure of undetermined cause as without this ability, working progress would be lost which could lead to a very frustrating usage of the application.

 

The approach is to use the Megablock Extractor (tool that detects and operates on Megablocks), as a starting point to develop a tool capable of manipulating Megablocks further so that a better performance can be achieved. Techniques that are going to be used focus on reducing the high overhead produced on the decisions made in the loops. This can be done at the cost of binary size by transforming loops into bigger sequences of instructions. It should be integrated into the interactive tool as a feature available to its user. 

 

Nesting View feature on the interactive GUI, was defined as an additional objective to allow the visualization of cases that have several Megablocks nested inside other Megablocks. With Nesting View, the user can understand better how all Megablocks are related and make more precise optimizations since a deeper representation of the system is available.

 

When a high iteration Megablock is mapped to the CGRA, the GPP will be waiting for it to end in order to continue its work. Though the CGPRA can do all the iterations way faster than the GPP, if even a few of them would be done by the GPP, it would result into a faster conclusion time for all iterations since the GPP wouldn’t be idle all the time. This same technique can be used when several CGRA units are available. It would be advantageous to have several RPUs executing iterations of the same Megablock which would results in a great reduction of the time needed to finish all iterations. So that this can be implemented in the future, another additional objective was created. It consists on making a careful analysis of the shared resources to detect Megablocks that can be processed on several hardware devices at the same time and to find a solution for the Megablocks where this could not be possible.